In the electronics industry, there are significant advantages to stacking and interconnecting integrated circuit packages to create high density, three-dimensional, multichip modules. Typical in module fabrication, I/O pads of the individual integrated circuit layers are interconnected using a variety of technologies, including conductive vias and metallized traces fabricated on the periphery of the module.
A fundamental advantage of stacking integrated circuit layers is the maximum utilization of limited surface area on a printed circuit board or substrate along with reduced interconnect parasitics. Stacking integrated circuit packages provides increased circuit density without requiring additional printed circuit board or substrate space. Further, stacking integrated circuit packages reduces signal lead lengths between the stacked components, reduces parasitic inductance and capacitance, which in turn, allows the circuits to operate at very high clock speeds and/or lower power consumption.
Current high frequency multichip electronic modules suffer from the disadvantage that they are very expensive and labor intensive to achieve high performance. For example, most modules employ low temperature co-fired ceramic (LTCC) or other exotic chip and wire substrates. These substrates are expensive and typically thick in nature.
In some instances, high frequency modules include modules operating in the radio frequency (RF) range. In other instances, high frequency modules include modules operating in the millimeter wave (MMW) range. In yet other instances, high frequency modules include modules operating in both RF and MMW range.
For high frequency modules employing RF chips, the RF chips are typically wire bonded or pre-packaged and solder attached onto the substrate to form the interconnect. This is not preferred due to parasitic losses and variability concerns caused by inconsistent wirebond lengths. For components that have delicate air bridge structures on their surface, wire bonding is not desirable because these structures are prone to damage and contamination. Soldering is not desirable for these structures due to flux contamination issues. Also, solder exposes the components to high temperatures and cleaning solvents, which may result in damage to components or cause substantial degradation of high frequency performance. RF chips are also typically fabricated with thick (>1 um) gold bond pads. As a result, solder/gold embrittlement will occur if chips are attached to an interconnect substrate via solder attach, thus degrading overall product reliability.